EP1C6Q240C8N IC FPGA 185 I/O 240QFP

Tsanangudzo

Cyclone® zvishandiso zvine maviri-dimensional mutsara- uye column-based architecture yekushandisa tsika logic.Column uye mitsara yekubatanidza yekumhanya kwakasiyana inopa chiratidzo chekubatanidza pakati peLABs uye akadzamirirwa memory block.Iyo logic array ine LABs, ine gumi LEs muLAB yega yega.Iyo LE chikamu chidiki chepfungwa chinopa kuita kwakaringana kwemushandisi logic mabasa.MaLAB akaiswa mumitsara nemakoramu pachishandiswa.Zvishandiso zvemadutu zviri pakati pe2,910 kusvika 20,060 LEs.M4K RAM zvidhinha ndezvechokwadi mbiri-port memory blocks ine 4K bits yendangariro pamwe ne parity (4,608 bits).Aya mabhururu anopa akatsaurwa echokwadi maviri-chiteshi, akareruka maviri-chiteshi, kana imwechete-chiteshi ndangariro kusvika ku36-bits yakafara kusvika ku250 MHz.Aya mabhuroki akaiswa muzvikamu mumakoramu pane mudziyo pakati pemamwe maLAB.Zvishandiso zvedutu zvinopa pakati pe60 kusvika 288 Kbits ye RAM yakadzikwa.Imwe neimwe Cyclone mudziyo I/O pini inodyiswa neI/O element (IOE) iri kumagumo emitsara yeLAB nemakoramu akatenderedza nharaunda yechishandiso.I/O mapini anotsigira akasiyana-siyana-anogumira uye akasiyana I/O mwero, senge 66- uye 33-MHz, 64- uye 32-bit PCI standard uye LVDS I/O mwero kusvika ku640 Mbps.IOE yega yega ine bidirectional I/O buffer uye matatu marejista ekunyoresa kupinza, kubuda, uye kuburitsa-inogonesa masaini.Dual-chinangwa DQS, DQ, uye DM pini pamwe chete nekunonoka cheni (inoshandiswa kuenzanisa-chikamu-kuenzanisa DDR masiginecha) inopa tsigiro yekubatanidza neyekunze ndangariro midziyo yakadai seDDR SDRAM, uye FCRAM zvishandiso zvinosvika ku133 MHz (266 Mbps).Cyclone zvishandiso zvinopa network yewachi yepasi rose uye anosvika maviri PLL.Iyo network yewachi yepasi rose ine mitsetse sere yewachi yepasi rose inofambisa mukati memudziyo wese.Iyo yepasirese wachi network inogona kupa wachi kune ese zviwanikwa mukati memudziyo, senge maIOE, LEs, uye memory block.Mitsetse yewachi yepasi rose inogona zvakare kushandiswa pakudzora masaini.Cyclone PLLs inopa zvakajairwa-chinangwa wachi nekuwedzeredza wachi uye nekuchinja kwechikamu pamwe nekubuda kwekunze kweyepamusoro-kumhanya mutsauko I/O rutsigiro.